TXMC635

TXMC635 Reconfigurable FPGA with 48 TTL I/O, 32 16bit Analogue In and 8 16bit Analogue Out

XMC module providing a user configurable Xilinx XC6SLX45T or Xilinx XC6SLX100T FPGA. The module has 48 ESD-protected TTL lines. All lines are individually programmable as input or output. Each TTL I/O line has a pull resistor. The pull-up voltage is selectable to be either +3.3V or +5V.
8 channels of 16 bit analogue outputs allow software selectable output voltage ranges of ±10V, ±10.2564V or ±10.5263V. The output voltage range can be individually set per channel. The conversion time is at most 10 μs and the DAC outputs are routed via operational amplifier in order to protect DAC from damage.
32 ADC input channels can be software configured to operate in single-ended or differential mode with 16 input channels. Each of the 32 channels has a resolution of 16 bit and can work with up to 1 MSPS. The programmable gain amplifier is software configurable and allows a full scale input voltage range of up to ±24.576.

For custom specific I/O extension or inter-board commuication the TXMC635 provides 64 FPGA I/Os on P14 and 3 FPGA Multi-Gigabit transceiver on P16. P14 I/O lines can be configured as an 64 single-ended LVCMOS33 or as an 32 differential LVDS33 interface.

The FPGA is configured by a platform flash SPI flash or via PCIe download. The flash device is in-system programmable. An in-circuit debugging option is available via a JTAG header for read back and real-time debugging of the FPGA design (using Xilinx “ChipScope”). User applications for the TXMC635 with XC6SLX45T-2 FPGA can be developed using the design software ISE Project Navigator and Embedded Development Kit (EDK).

The TXMC635 provides front panel I/O via a VHD100 connector and rear panel I/O via P14 and P16.

A wide range of drivers is available: Linux, LynxOS, Integrity, QNX, VxWorks and Windows. All drivers - except the Windows drivers - are supplied as C source code.