TAMC532

TAMC532 32 Channel 12/14 Bit 75/50 MSps AD Converter

12/14 bit AD converter with 32 inputs. The 32 ADCs provide 75 MSps at 12 bit resolution or 50 MSps at 14 bit resolution. The TEWS Technologies TAMC532 has a MTCA.4 zone 3 interface according to class A2.1. Data readout can be done via several interfaces like PCIe or two SFP cages in the front panel.

The TAMC532 contains additionally a Kintex-7 FPGA and 512 MB DDR3 RAM, opt. up to 4 GB RAM. The FPGA does the data pre-processing and controls the data transfer to the CPU via a PCIe x4 interface. In-circuit programming and debugging of the fPGA design is supported. The program and debug box TA900 or the standard Xilinx JTAG header allows access to the module while it is inserted in a system. In addition to the module's JTAG Chain, the TA900 allows access to the UART of the in-board Module Management Controller (MMC) and two user pins of the FPGA. IF a UART core is implemented in the FPGA, serial communication via the TA900 is possible. The TA900 can be accessed by USB 2.0 and by a 14-pin JTAG header.

The TAMC532-TM is a MTCA.4 compliant Micro Rear Transition Module (Micro RTM) for the TAMC532. Eight RJ45 connectors ate used as input connectors for the 32 differential analogue inputs of the TMAC532-TM. Each of the 32 differential analogue inputs is connected to its own filter block. Gain, Pole-Zero compensation, shaping time and baseline shift are adjustable.

A wide range of drivers is available: Windows, Linux, LynxOS, QNX, VxWorks, and Integrity. All drivers - except the Windows drivers - are supplied as C source code.