TCP863

TCP863 4 Channel high-speed syn. Serial Interface

3U CompactPCI board with 4 channel high-speed syn. serial interface. The TEWS Technologies TCP863-10 provides front panel I/O via HD68 SCSI-3 type connector and TCP863-20 additionally provides rear I/O via J2.

The serial communication controller is implemented in FPGA logic, along with the bus master capable PCI interface, guaranteeing long term availability and having the option to implement additional functions in the future. Several interrupt sources can generate interrupts on INTA for each channel. Interrupts can be enabled and disabled separately. A 14.7456 MHz oscillator provides standard asynchronous baud rates. An additional 24 MHz oscillator is provided for other baud rates. A 10 MHz oscillator is used for the synchronous baud rate of 10 Mbit/s.

Each channel supports various serial communication protocols such as HDLC, asynchronous, isochronous, synchronous. Multiprotocol transceivers are used for the line interfaces. The physical interface can be selected by software individually for each channel as EIA-232, EIA-422, EIA-449, EIA-530, EIA-530A, V.35, V.36 or X.21.

The TCP863 supports RxD+/-, TxD+/-, RxC+/-, TxC+/-, RTS+/-, CTS+/- and CD+/- lines for each channel. Additionally channel 3 provides DSR3+/- and DTR3+/- signals, both over front I/O only. The FPGA controller contains a receive and transmit FIFO of 512 long words (32 bit) per channel.

The TCP863 provides front panel I/O via a HD-68 SCSI-3 type connector and J2 I/O.

A wide range of drivers is available: Linux, QNX, VxWorks and Windows. All drivers - except the Windows drivers - are supplied as C source code.